VHDL for logic synthesis / Andrew Rushton
| Main Author: | Rushton, Andrew |
|---|---|
| Format: | MONOGRAPHS |
| Language: | English |
| Published: |
Chichester, West Sussex : Wiley, 2011 |
| Edition: | 3rd ed. |
| Subjects: |
Computer-aided design.
Logic design. VHDL (Computer hardware description language) |
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