VHDL for logic synthesis / Andrew Rushton
| Main Author: | Rushton, Andrew |
|---|---|
| Format: | MONOGRAPHS |
| Language: | English |
| Published: |
Chichester, West Sussex : Wiley, 2011 |
| Edition: | 3rd ed. |
| Subjects: |
Computer-aided design.
Logic design. VHDL (Computer hardware description language) |
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|---|---|---|---|
| 001 | 0061966 | ||
| 003 | Th-MUT | ||
| 008 | 181106s9999 xx 000 0 eng d | ||
| 020 | |a 9780470688472 |c 2550 | ||
| 040 | |a DLC |c MUT | ||
| 050 | 4 | |a TK7885.7 |b R98V43 2011 | |
| 100 | 1 | |a Rushton, Andrew | |
| 245 | 1 | 0 | |a VHDL for logic synthesis |b / |c Andrew Rushton |
| 250 | |a 3rd ed. | ||
| 260 | |a Chichester, West Sussex : |b Wiley, |c 2011 | ||
| 300 | |a xvi, 466 p. : |b illus. ; |c 25 cm. | ||
| 504 | |a Includes bibliographical references and index. | ||
| 650 | 0 | |a Computer-aided design. | |
| 650 | 0 | |a Logic design. | |
| 650 | 0 | |a VHDL (Computer hardware description language) | |
| 991 | |a MONOGRAPHS |b 6 |c 2018-11-07 06:09:52 |d 2022-04-20 13:51:10 |e mut |f n |g null |h n |i a |j m |k |l a |m |n a |o |p b |q |r enk |s eng |t 2011 |u 3rd ed. |v VHDL for logic synthesis / | ||