Quick-turnaround asic design in VHDL : core-based behavioral synthesis / Mohamed S. Ben Romdhane, Vijay K. Madisetti, John W. Hines
| Main Author: | Ben Romdhane, Mohamed S. |
|---|---|
| Other Authors: | Hines, John W. |
| Format: | MONOGRAPHS |
| Language: | English |
| Published: |
Boston, MA. : Kluwer Academic Pub., 1996 |
| Series: |
Kluwer international series in engineering and computer science
|
| Subjects: |
Application-specific integrated circuits.
Computer-aided design. VHDL (Computer hardware description language) |
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| 008 | 181106s9999 xx 000 0 eng d | ||
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| 040 | |a DLC |c MUT | ||
| 050 | 4 | |a TK7874.6 |b B53Q85 | |
| 100 | 1 | |a Ben Romdhane, Mohamed S. | |
| 245 | 1 | 0 | |a Quick-turnaround asic design in VHDL : core-based behavioral synthesis |b / |c Mohamed S. Ben Romdhane, Vijay K. Madisetti, John W. Hines |
| 260 | |a Boston, MA. : |b Kluwer Academic Pub., |c 1996 | ||
| 300 | |a xviii, 180 p. : |b tables ; |c 24 cm. | ||
| 440 | 0 | |a Kluwer international series in engineering and computer science | |
| 500 | |a Includes index. | ||
| 650 | 0 | |a Application-specific integrated circuits. | |
| 650 | 0 | |a Computer-aided design. | |
| 650 | 0 | |a VHDL (Computer hardware description language) | |
| 700 | 1 | |a Hines, John W. | |
| 991 | |a MONOGRAPHS |b 6 |c 2018-11-06 22:29:33 |d 2022-01-13 15:40:54 |e mut |f n |g null |h n |i a |j m |k |l a |m |n a |o |p b |q |r mau |s eng |t 1996 |v Quick-turnaround asic design in VHDL : core-based behavioral synthesis / | ||