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APA Citation
Ben Romdhane, M. S., & Hines, J. W. (1996). Quick-turnaround asic design in VHDL : core-based behavioral synthesis. Boston, MA.: Kluwer Academic Pub..
MLA CitationBen Romdhane, Mohamed S., and John W Hines. Quick-turnaround Asic Design in VHDL : Core-based Behavioral Synthesis. Boston, MA.: Kluwer Academic Pub., 1996.
Warning: These citations may not always be 100% accurate.