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|a DLC
|c MUT
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|a TK7885.7
|b P34V47
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| 100 |
1 |
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|a Palnitkar, Samir
|
| 245 |
1 |
0 |
|a Verilog HDL : a guide to digital design and synthesis
|b /
|c Samir Palnitkar
|
| 260 |
|
|
|a Upper Saddle River, NJ. :
|b Prentice Hall,
|c 1996
|
| 300 |
|
|
|a xxxviii, 396 p. :
|c 24 cm. + CD-ROM
|
| 500 |
|
|
|a Includes index.
|
| 650 |
|
0 |
|a Verilog (Computer hardware description language)
|
| 991 |
|
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|a MONOGRAPHS
|b 3
|c 2018-11-07 02:51:40
|d 2021-12-23 11:06:20
|e mut
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|g null
|h n
|i a
|j m
|k
|l a
|m
|n a
|o
|p b
|q
|r nju
|s eng
|t 1996
|v Verilog HDL : a guide to digital design and synthesis /
|
